1. Field of the Invention
The present invention generally relates to systems design and, more particularly, to high-level synthesis of application-specific subsystems with consideration given to system-wide resource availability, so as to determine whether the most effective implementation is in hardware or software, and then to synthesize the logic into hardware or software as determined to be most optimal.
2. Background Description
Most digital systems can be abstracted to a simple model in which a core programmable processor executes software programs, while application-specific functions that are either performance critical or cannot be implemented in software are performed by a set of Application Specific Integrated Circuits (ASICs). In addition, busses provide communication channels and memory elements provide storage. For example, in a typical signal processing system, the core processor is usually a general purpose Digital Signal Processing (DSP) chip, like the TMS320xx or ATT-DSP32, while specialized functions like compression/decompression and high-throughput filtering are performed in hardware by the ASICS.
It is usually the case that most of the functions implemented in hardware can be performed in software as well. For example, consider a multiply-accumulate function or an Finite duration Impulse Response (FIR) filtering function. The reason hardware is chosen is simply to satisfy the performance constraints imposed on the system. While software offers lower cost and faster turn-around, hardware offers better performance at higher cost. In synthesis parlance, cost is usually a measure of area, of the chip or the board.
With the emerging trend towards systems-on-a-chip, it becomes all the more important to minimize cost while meeting performance constraints. A basic necessity for obtaining such optimized implementations is to partition the system description into hardware and software components in an intelligent way. This problem of hardware-software partitioning is not yet well understood and is an emerging subject of research in the high-level synthesis community.
Typically, the synthesis of an application-specific function like filtering starts with a Hardware Description Language (HDL) description of the function, which is then translated into an intermediate form. Hardware is allocated to the individual operation in the function, and resource sharing is performed as much as possible. After several other steps, a chip implementing the function in question will be achieved. It is important to note that this chip is being used in a system, yet none of the hardware and software resources available outside its immediate boundaries have been considered in synthesizing it. When all the components of a system are integrated on a chip, it becomes more feasible and very often necessary to consider such global resource sharing aimed at reducing the cost.
In the past, hardware-software partitioning was usually done empirically. Even then it has not been applied as a technique for better high-level synthesis. Designers make these decisions manually based on their expertise.